page 1 of 7 ?2004-2009 peregrine semiconductor corp. all rights reserved. document no. 70-0166-06 www.psemi.com 20-lead 4x4 mm qfn the PE4257 is a high-isolation ultracmos? switch designed for wireless applications, covering a broad frequency range from near dc up to 3000 mhz. this single-supply spdt switch integrates a two-pin cmos control interface. it also provides low insertion loss with extremely low bias requirements while operating on a single 3-volt supply. in a typical wireless application, the PE4257 provides unprecedented isolation and integration. the PE4257 is manufactured on peregrine?s ultracmos? process, a patented variation of silicon-on-insulator (soi) technology on a sapphire substrate, offering the performance of gaas with the economy and integration of conventional cmos. product specification 50 ? spdt absorptive ultracmos? dc ? 3.0 ghz rf switch product description figure 1. functional diagram PE4257 features ? 50 ? characteristic impedance ? integrated 50 ? 0.25 watt terminations ? high input ip3 > +55 dbm ? high isolation 64 db at 1000 mhz ? low insertion loss: typically 0.75 db at 1000 mhz and 0.95 db at 2000 mhz ? lv cmos two-pin control ? single +3 volt supply operation ? low current consumption: 8 a parameter condition minimu m typical maximum units operating frequency 1 dc 3000 mhz insertion loss 1000 mhz 2000 mhz 3000 mhz 0.75 0.95 1.2 0.95 1.15 1.4 db isolation input to output 1000 mhz 2000 mhz 3000 mhz 61 46 40 64 50 44 db isolation output to output 1000 mhz 2000 mhz 3000 mhz 57 54 42 63 60 48 db input ip2 5 mhz - 1000 mhz 80 dbm input ip3 5 mhz - 1000 mhz 50 55 dbm input 1db compression 2 1000 mhz 29 31 dbm switching time 50% ctrl to 10 / 90 rf 2 s video feedthrough 3 5 mhz - 1000 mhz 15 mv pp notes: 1. device linearity will begin to degrade below 5 mhz. 2. note absolute maximum ratings in table 3. 3. measured with a 1 ns risetime, 0/3 v pulse and 500 mhz bandwidth figure 2. package type table 1. electrical specifications @ +25 c, v dd = 3.0 v (z s = z l = 50 ? ) rf1 rf2 50 ? 50 ? cmos control driver esd esd 50 ? rfc ctrl ctrl2 esd
product specification PE4257 page 2 of 7 document no. 70-0166-06 ultracmos? rfic solutions ?2004-2009 peregrine semiconductor corp. all rights reserved. 4x4mm 20-lead qfn gnd 15 14 13 12 11 3 4 5 2 1 17 16 18 19 20 9 10 8 7 6 ctrl2 gnd gnd gnd gnd gnd rfc vdd ctrl1 vss/gnd gnd gnd gnd rf2 gnd, rf2 term. gnd gnd, rf1 term. rf1 gnd gnd no. name description 1 gnd rf ground 2 gnd rf ground 3 1 rf1 rf i/o 4 gnd rf ground 5 gnd rf ground 6 gnd rf ground 7 gnd rf ground 8 1 rfc rf common 9 gnd rf ground 10 gnd rf ground 11 gnd rf ground 12 gnd rf ground 13 1 rf2 rf i/o 14 gnd rf ground 15 gnd rf ground 16 2 ctrl2 control 2 17 2 ctrl1 control 1 18 3 vss / gnd negative supply option 19 gnd digital ground 20 vdd supply pad gnd rf ground pad table 2. pin descriptions table 3. absolute maximum ratings electrostatic discharge (esd) precautions when handling this ultracmos? device, observe the same precautions that you would use with other esd- sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the rating specified. latch-up avoidance unlike conventional cmos devices, ultracmos? devices are immune to latch-up. table 4. operating ranges @ 25 c notes: 1. rf pins 3, 8, and 13 must be at 0 vdc. the rf pins do not require dc blocking capacitors for proper operation if the 0 vdc requirement is met. 2. pins 16 and 17 are the cmos controls that set the four operating states. 3. connect pin 18 to gnd to enable the negative voltage generator. connect pin 18 to v ss (-3 v) to bypass and disable internal -3 v supply generator. see paragraph ?switching frequency.? symbol parameter/condition min max units v dd power supply voltage -0.3 4.0 v v i voltage on any dc input -0.3 v dd + 0.3 v p rf rf power on rfc, rf1, rf2 on port/ terminated port 33/24 dbm t st storage temperature -65 +150 c t op operating temperature -40 +85 c v esd esd voltage (human body model) 1000 v parameter min typ max unit v dd power supply 2.7 3.0 3.3 v i dd power supply current (v dd = 3v, v cntl = 3v) 8 20 a control voltage high 0.70 v dd v control voltage low 0 0.30 v dd v switching frequency the PE4257 has a maximum 25 khz switching rate when the internal negative voltage generator is used (pin 18=gnd). the rate at which the PE4257 can be switched is only limited to the switching time if an external -3 v supply is provided at (pin18=v ss ). figure 3. pin configuration (top view) exceeding absolute maximum ratings may cause permanent damage. operation should be restricted to the limits in the operating ranges table. operation between operating range maximum and absolute maximum for extended periods may reduce reliability. table 5. truth table ctrl1 ctrl2 rfc ? rf1 rfc ? rf2 low low off off low high off on high low on off high high n/a 1 n/a 1 notes: 1. the operation of the PE4257 is not supported or characterized in the c1=v dd and c2=v dd state.
product specification PE4257 page 3 of 7 ?2004-2009 peregrine semiconductor corp. all rights reserved. document no. 70-0166-06 www.psemi.com typical performance data @ 25c (unless otherwise noted) (50-ohm impedance) figure 4. insertion loss ? input - output figure 5. rf1 to rf2 isolation figure 6. isolation ? rfc to rf1/rf2 figure 7. return loss
product specification PE4257 page 4 of 7 document no. 70-0166-06 ultracmos? rfic solutions ?2004-2009 peregrine semiconductor corp. all rights reserved. evaluation kit the spdt switch evaluation kit board was designed to ease customer evaluation of the PE4257 spdt switch. the rf common port is connected through a 50 ? transmission line to j2. port 1 and port 2 are connected through 50 ? transmission lines to j1 and j3. a through transmission line connects sma connectors j4 and j5. this transmission line can be used to estimate the lo ss of the pcb over the environmental conditions being evaluated. the board is constructed of a four metal layer fr4 material with a total thickness of 0.031?. the transmission lines were designed using a coplanar waveguide with ground plane (28 mil core, 47.6 mil width, 30mil gap). note the number of vias surrounding the device in the layout shown in figure 8. these vias are critical for obtaining the specified is olation performance for the device shown in this datasheet. j6 provides a means for controlling dc and digital inputs to the device. the provided jumpers short the package pin to ground for logic low. when the jumper is removed, the pin is pulled up to vdd for logic high. when the jumper is in place, 3 a of current will flow through the 1 m ? pull up resistor. this extra current should not be attributed to the requirements of the device. figure 8. evaluation board layouts figure 9. evaluation board schematic peregrine specification 101/0151 peregrine specification 102/0198 50 ohm t-line 50 ohm t-line 50 ohm t-line 50 ohm t-line 1 2 j5 j5 r1 1m r1 1m 1 1 3 3 5 5 7 7 2 2 4 4 6 6 8 8 10 10 12 12 14 14 13 13 9 9 11 11 j6 header 7x2 j6 header 7x2 r2 1m r2 1m 1 2 j4 j4 1 2 j3 j3 gnd 7 gnd 2 rf1 3 gnd 4 gnd 5 gnd 6 gnd 1 rfc 8 gnd 9 gnd 10 gnd 12 gnd 11 rf2 13 gnd 14 gnd 15 c2 16 c1 17 vss/gnd 18 gnd 19 vdd 20 u1 pe4255/PE4257/pe42551 u1 pe4255/PE4257/pe42551 c3 dni c3 dni c2 dni c2 dni c1 dni c1 dni 1 2 j2 j2 1 2 j1 j1
product specification PE4257 page 5 of 7 ?2004-2009 peregrine semiconductor corp. all rights reserved. document no. 70-0166-06 www.psemi.com 20-lead 4x4 qfn figure 10. package drawing
product specification PE4257 page 6 of 7 document no. 70-0166-06 ultracmos? rfic solutions ?2004-2009 peregrine semiconductor corp. all rights reserved. table 6. ordering information order code part mark ing description package shipping method 4257-00 PE4257-ek PE4257-20qfn 4x4mm-ek evaluation kit 1 / box 4257-51 4257 PE4257g-20qfn 4x4mm-75a green 20-lead 4x 4mm qfn 75 units / cut tape from reel 4257-52 4257 PE4257g-20qfn 4x4mm-3000c green 20-lead 4x4mm qfn 3000 units / t&r figure 12. marking specifications figure 11. tape and reel drawing 4257 yyww zzzzz yyww = date code zzzzz = last five digits of psc lot number device orientation in tape top of device pin 1 tape feed direction
product specification PE4257 page 7 of 7 ?2004-2009 peregrine semiconductor corp. all rights reserved. document no. 70-0166-06 www.psemi.com sales offices the americas peregrine semiconductor corporation 9380 carroll park drive san diego, ca 92121 tel: 858-731-9400 fax: 858-731-9499 europe peregrine semiconductor europe batiment maine 13-15 rue des quatre vents f-92380 garches, france tel: +33-1-4741-9173 fax : +33-1-4741-9173 for a list of representatives in your area, please refer to our web site at: www.psemi.com data sheet identification advance information the product is in a formative or design stage. the data sheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification the data sheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at an y time without notice in order to supply the best possible product. product specification the data sheet contains final dat a. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a dcn (document change notice). the information in this data sheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which persona l injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental dam ages, arising out of the use of its products in such applications. the peregrine name, logo, and utsi are registered trademarks and ultracmos, harp, multiswitch and dune are trademarks of peregrine semiconductor corp. hi-rel and defense products americas: tel: 858-731-9453 europe, asia pacific: 180 rue jean de guiramand 13852 aix-en-provence cedex 3, france tel: +33-4-4239-3361 fax: +33-4-4239-7227 peregrine semiconductor, asia pacific (apac) shanghai, 200040, p.r. china tel: +86-21-5836-8276 fax: +86-21-5836-7652 peregrine semiconductor, korea #b-2607, kolon tripolis, 210 geumgok-dong, bundang-gu, seongnam-si gyeonggi-do, 463-943 south korea tel: +82-31-728-3939 fax: +82-31-728-3940 peregrine semiconductor k.k., japan teikoku hotel tower 10b-6 1-1-1 uchisaiwai-cho, chiyoda-ku tokyo 100-0011 japan tel: +81-3-3502-5211 fax: +81-3-3502-5213
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